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Design of an Adaptive Hearing Aid Algorithm using Booth-Wallace Tree Multiplier
Jitendra Kumar Das , K. K. Mahapatra
Pages - 1 - 17     |    Revised - 30-08-2010     |    Published - 30-10-2010
Volume - 1   Issue - 1    |    Publication Date - December 2010  Table of Contents
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KEYWORDS
Booth Multiplier, Booth Wallace Multiplier, Adaptive Lattice Filter
ABSTRACT
The paper presents FPGA implementation of a spectral sharpening process suitable for speech enhancement and noise reduction algorithms for digital hearing aids. Booth and Booth Wallace multiplier is used for implementing digital signal processing algorithms in hearing aids. VHDL simulation results confirm that Booth Wallace multiplier is hardware efficient and performs faster than Booth’s multiplier. Booth Wallace multiplier consumes 40% less power compared to Booth multiplier. A novel digital hearing aid using spectral sharpening filter employing booth Wallace multiplier is proposed. The results reveal that the hardware requirement for implementing hearing aid using Booth Wallace multiplier is less when compared with that of a booth multiplier. Furthermore it is also demonstrated that digital hearing aid using Booth Wallace multiplier consumes less power and performs better in terms of speed.
CITED BY (1)  
1 Jairath, A., & Shah, S. K. (2012). Design & implementation of FPGA based digital filters. International Journal of Advanced Research in Computer Engineering & Technology (IJARCET), 1(7), pp-199.
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Associate Professor Jitendra Kumar Das
Asst. Professor - India
jkdas12@gmail.com
Dr. K. K. Mahapatra
- India