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Design of an Adaptive Hearing Aid Algorithm using Booth-Wallace Tree Multiplier
Jitendra Kumar Das , K. K. Mahapatra
Pages - 1 - 17     |    Revised - 30-08-2010     |    Published - 30-10-2010
Volume - 1   Issue - 1    |    Publication Date - December 2010  Table of Contents
Booth Multiplier, Booth Wallace Multiplier, Adaptive Lattice Filter
The paper presents FPGA implementation of a spectral sharpening process suitable for speech enhancement and noise reduction algorithms for digital hearing aids. Booth and Booth Wallace multiplier is used for implementing digital signal processing algorithms in hearing aids. VHDL simulation results confirm that Booth Wallace multiplier is hardware efficient and performs faster than Booth’s multiplier. Booth Wallace multiplier consumes 40% less power compared to Booth multiplier. A novel digital hearing aid using spectral sharpening filter employing booth Wallace multiplier is proposed. The results reveal that the hardware requirement for implementing hearing aid using Booth Wallace multiplier is less when compared with that of a booth multiplier. Furthermore it is also demonstrated that digital hearing aid using Booth Wallace multiplier consumes less power and performs better in terms of speed.
CITED BY (1)  
1 Jairath, A., & Shah, S. K. (2012). Design & implementation of FPGA based digital filters. International Journal of Advanced Research in Computer Engineering & Technology (IJARCET), 1(7), pp-199.
1 Google Scholar 
2 CiteSeerX 
3 refSeek 
4 Scribd 
5 SlideShare 
7 PdfSR 
A. D. Booth. “A signed binary multiplication technique”. Quart. J. Math., IV(2):1951
A. Kumar, S. K. Mullick. "Nonlinear dynamical analysis of speech". Journal of Acoustical Society of America, 100(1):615-629, 1996
A. Schaub and P. Straub. “Spectral sharpening for speech enhancement/noise reduction”. In IEEE Acoustics, Speech and Signal Processing (ICASSP-91)1991
Charles H Roth. “Digital system design using VHDL”. Jr. Thomson Brooks/Cole
Edwards, B. D. “Signal Processing Techniques for a DSP Hearing Aid”. IEEE International Symposium on Circuits and Systems, 6:586 – 589,1998
F. Buergin, F. Carbognani and M. Hediger. “Low Power Architecture Trade-offs in a VLSI Implementation of an Adaptive Hearing Aid Algorithm”. IEEE, 2006
J. A. Maxwell, P. M. Zurek, “Reducing acoustic feedback in hearing aids”. IEEE Trans. Speech Audio Processing, 3:304–313, 1993
J. Wassner, H. Kaeslin, N. Felber, W. Fichtner. “Waveform coding for low-power digital filtering of speech data”. IEEE Transactions on Signal Processing, 51(6):1656– 1661, June 2003
L. P. Rubinfield. “A proof of the modified booth’s algorithm for multiplication”. IEEE Trans. Computers, 37: 1988.
M. Nayeri, W. Jenkins. “Alternate realizations of adaptive IIR filters and properties of their performance surfaces”. IEEE Transactions on Circuits and Systems, 36:485-496, 1989
M.J.Liao, C.F.Su, Chang and A. Wu. “A carry select adder optimization technique for high-performance Booth-encoded Wallace tree multipliers”. IEEE International Symposium on Circuits and Systems, 2002.
O. O. Khalifa, M.H Makhtar, M.S. Baharom. “Hearing Aids System for Impaired People”. International journal of computing and Information science,2(1):23-26, 2004
R. Dhiman, A. Kumar and R. Bahl. “Design of low power multi-DSP module for acoustic signal processing on remote platforms”. Proc. Intl. Conf. on Sonar – Sensors and Systems, Kochi, 2002
Regalia, Phillip A. “Adaptive IIR Filtering in Signal Processing and Control”. Marcel Dekker, Inc., 1995
S. Haykin. “Adaptive Filter”. PHI Publication
S. K. Mitra. “DSP A Computer based Approach”. Tata McGraw Hill Publication, 2nd Edition, 2001
S. Ramamoha, S. Dandapat. “Sinusoidal Model based Analysis and Classification of Stressed Speech”. IEEE Trans. On Speech, Audio and Language Processing, 14(3):737- 746, 2006
Sankarayya, N., Roy, K., and Bhattacharya, D. “Algorithms for Low-Power and High- Speed FIR Filter Realization Using Differential Coefficients”. IEEE Trans. On Circuits and Systems, 44(6):488-497, 1997
V. Venugopal, K.H. Abed and S.B. Nerurkar. “Design and implementation of a Decimation Filter for hearing aid applications”. Proceedings of IEEE Southeast Con: 2005
Wallace, C.S. “A suggestion for a fast multiplier”. IEEE Trans. Electron. Compute, EC-13:14-17, 1964
Associate Professor Jitendra Kumar Das
Asst. Professor - India
Dr. K. K. Mahapatra
- India